Gente, les dejo esta data… me parecio interesante… en realidad son dos noticias en una sola…
"TSMC, also known as Taiwan Semiconductor Manufacturing Company, has just announced that it is ready with its 55 nanometre process.
We still have to see 65 nanometre graphic chips, scheduled for May, but TSMC is talking about the 55 process. Nvidia is already doing some pilot productions of 55 chips and there might be some samples that will come out of TSMC in 55 nanometre in second half of 2007.
The volume production in 55 nanometre is expected for the first quarter of 2008. Headsets and graphics will benefit from the 55 process and we already told you that 55 nanometre is just a shrink down of 45 nanometre"
"90 percent linear shrink from 65 nm
TSMC is ready with its half node 55 nanometre process, a 90 percent linear shrink from 65 nanometre. The shrink includes I/O, analogue circuits and the initial test production starts this quarter.
The big fab claims that 55 process delivers significant die cost saving from 65 nm and at the same time offering 10 to 20 percent lower power consumption at the same clock speed. As 55 nanometre is a a direct shrink, the chip companies can leverage existing libraries and port their 65 chips to 55 nanometre. This should not be a big trouble.
It also offers its key customers to use CyberShuttle prototype program that allows multiple customers to share the cost of the single mask set and prototype wafers on the pilot run. This means that Nvidia and ATI can split the bill when they tape out their 55 chips, but we don’t think that this will happen. You never know.
TSMC offers six generation of marchitecture from 350 nanometre gate size to 55 nanometre"